Product Summary

The EP1C6Q240C8N is a cyclone FPGA. The CycloneTM field programmable gate array EP1C6Q240C8N is based on a 1.5-V, 0.13-μm, all-layer copper SRAM process, with densities up to 20,060 logic elements (LEs) and up to 288 Kbits of RAM. With features like phaselocked loops (PLLs) for clocking and a dedicated double data rate (DDR) interface to meet DDR SDRAM and fast cycle RAM (FCRAM) memory requirements. The EP1C6Q240C8N is a cost-effective solution for data-path applications.

Parametrics

EP1C6Q240C8N absolute maximum ratings: (1)VCCINT Supply voltage With respect to ground: –0.5 to 2.4 V; VCCIO: –0.5 to 4.6 V; (2)VI DC input voltage: –0.5 to 4.6 V; (3)IOUT DC output current, per pin: –25 25 mA; (4)TSTG Storage temperature No bias: –65 to 150℃; (5)TAMB Ambient temperature Under bias: –65 to 135℃; (6)TJ Junction temperature BGA packages under bias: 135℃.

Features

EP1C6Q240C8N features: (1)Up to 294,912 RAM bits (36,864 bytes); (2)Supports configuration through low-cost serial configuration device; (3)Support for LVTTL, LVCMOS, SSTL-2, and SSTL-3 I/O standards; (4)Support for 66-MHz, 32-bit PCI standard; (5)Low speed (311 Mbps) LVDS I/O support; (6)Up to two PLLs per device provide clock multiplication and phase shifting; (7)Up to eight global clock lines with six clock resources available per logic array block (LAB) row.

Diagrams

EP1C6Q240C8N block diagram

Image Part No Mfg Description Data Sheet Download Pricing
(USD)
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